1. Field of the Invention
The present invention relates to a semiconductor module, and particularly relates to a semiconductor module (power module) used for a power conversion device such as an inverter device for driving a motor, a direct current (DC)-DC converter device, and the like.
2. Background of the Related Art
In a semiconductor module used for a power conversion device, a plurality of power semiconductor chips for power conversion are integrated into one package, and circuit wiring suitable to a desired application is formed in the package, which contributes to reducing the overall size of the application device. As a semiconductor module, there is known an IPM (Intelligent Power Module) that further includes a driver for driving power semiconductor devices and a control integrated circuit (IC) having a function of detecting and protecting against an abnormality such as overcurrent and the like (see, for example, Japanese Laid-Open Patent Publication No. 2013-258321). Japanese Laid-Open Patent Publication No. 2013-258321 discloses an exemplary configuration of a semiconductor module included in an inverter device that drives a three-phase AC motor.
FIG. 12 is a circuit diagram illustrating an example of an inverter device using a conventional semiconductor module; FIG. 13 is a plan view illustrating an exemplary configuration of the conventional semiconductor module; FIG. 14 is a cross-sectional view illustrating the exemplary configuration of the conventional semiconductor module; and FIG. 15 is a cross-sectional view illustrating an example of how the conventional semiconductor module is attached.
As illustrated in FIG. 12, a conventional semiconductor module 100 includes three upper and lower arm portions, thereby forming a three-phase inverter circuit. The semiconductor module 100 uses IGBTs (Insulated Gate Bipolar Transistors) and FWDs (Free Wheeling Diodes) as power semiconductor devices.
In the semiconductor module 100, a first upper and lower arm portion is formed by connecting an anti-parallel connected IGBT 101 and FWD 102 in series with an anti-parallel connected IGBT 103 and FWD 104. A second upper and lower arm portion is formed by connecting an anti-parallel connected IGBT 105 and FWD 106 in series with an anti-parallel connected IGBT 107 and FWD 108. A third upper and lower arm portion is formed by connecting an anti-parallel connected IGBT 109 and FWD 110 in series with an anti-parallel connected IGBT 111 and FWD 112. Collector terminals of the IGBTs 101, 105, and 109 of the first through third upper and lower arm portions are connected to a power supply positive terminal P, and emitter terminals of the IGBTs 103, 107, and 111 of the first through third upper and lower arm portions are connected to a power supply negative terminal N. Midpoints of the first through third upper and lower arm portions are connected to main current terminals U, V, and W, respectively. The main current terminals U, V, and W are connected to input terminals of corresponding phases of a motor 120. Note that in this circuit diagram, control ICs that control the IGBTs 101 and 103, the IGBTs 105 and 107, and the IGBTs 109 and 111 are omitted.
For this semiconductor module 100, two capacitors 131 and 132 connected in series are connected between the power supply positive terminal P and the power supply negative terminal N, and a common connection point of the capacitors 131 and 132 is connected to a housing of the inverter device and is thereby connected to ground.
Regarding the configuration of the semiconductor module 100, as illustrated in FIGS. 13 and 14, six circuit patterns 141 are formed on an Al (aluminum) insulating substrate 140, and an IGBT chip 142 and an FWD chip 143 are mounted on each of the circuit patterns 141. A circuit block including the Al insulating substrate 140, the circuit patterns 141, the IGBT chips 142, and the FWD chips 143 is bonded to a lower surface of a terminal case 150 so as to cover a center opening thereof. Control ICs 152 are mounted on lead terminals (lead frame) 151 that are inserted upon molding of the terminal case 150. In this state, a bonding wire 153 electrically connects between a lead terminal 151a and the control IC 152, and between the control IC 152 and the IGBT chip 142. Further, a bonding wire 154 electrically connects between the IGBT chip 142 and the FWD chip 143, and between the FWD chip 143 and a lead terminal 151b. Furthermore, as illustrated in FIGS. 13 and 14, an electrical connection is made between the circuit pattern 141 and the lead terminal 151b, and between the control IC 152 and a sense emitter terminal of the IGBT chip 142. After that, the terminal case 150 is filled with resin 160, so that the circuit block, the control ICs 152, and the bonding wires 153 and 154 are resin-sealed.
A heat spreader 113 is joined to a surface of the Al insulating substrate 140 opposite to a surface thereof on which the circuit patterns 141 are formed. The heat spreader 113 is for dissipating heat generated by the IGBT chips 142 and the FWD chips 143 to the outside.
As illustrated in FIG. 15, for example, the semiconductor module 100 is attached to a heat sink 170. More specifically, the semiconductor module 100 is arranged such that the heat spreader 113 is in contact with the heat sink 170 through a thermal compound 171. Further, the semiconductor module 100 is mounted on a printed circuit board 180 on which the capacitors 131 and 132 are mounted. The printed circuit board 180 is fixed to the heat sink 170 with a screw 190. The screw 190 electrically connects a circuit pattern 181, which is commonly connected to the capacitors 131 and 132, to the heat sink 170. Accordingly, the common connection point of the capacitors 131 and 132 is connected to the heat sink 170 or a housing serving also as the heat sink 170, and is thereby connected to ground.
With the configuration described above, the control ICs 152 perform switching control of the IGBTs 101 and 103, the IGBTs 105 and 107, and the IGBTs 109 and 111 at arbitrary timing, thereby making it possible to control the motor 120 to rotate at a desired speed. Noise generated by the switching control is bypassed by the capacitors 131 and 132 and is connected to ground so as to be reduced. This ground is hereinafter referred to as chassis ground.
In the example described above, the semiconductor module 100 includes IGBTs as power semiconductor devices. However, even in the case where power transistors or MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) are used as power semiconductor devices, it is possible to form a semiconductor module as in the case where IGBTs are used.
In a conventional semiconductor module, noise generated by switching control of a power semiconductor device is bypassed by an external capacitor and is connected to ground so as to be reduced. Further, in the conventional semiconductor module, a heat spreader is electrically insulated from a circuit block by an Al insulating substrate in terms of direct current. However, in the conventional semiconductor module, a circuit pattern is capacitively coupled to the heat spreader (by parasitic capacitances 114 in FIG. 12) via the Al insulating substrate. Therefore, if the potential of the circuit pattern changes, the potential of the heat spreader also changes due to the capacitive coupling, so that radiation noise is increased. On the other hand, in the case where the heat spreader and the housing are electrically connected, a noise current due to the potential change in the heat spreader is returned into the module via the housing. However, if an insulating thermal compound is applied between the heat spreader and the housing, there may be a capacitive coupling (a parasitic capacitance 115 in FIG. 12) between the heat spreader and the housing, or there may be some points of direct electrical connection, depending on the manner in which the module is pressed and the flatness of the heat dissipation surface. Therefore, electrical connection points between the heat spreader and the housing vary, which is likely to cause individual differences in noise characteristics. Further, in the case where the capacitor that bypasses a noise current is externally connected to the semiconductor module, the size of the circuit substrate on which the semiconductor module is mounted is increased. In addition, as indicated by the broken-line arrows in FIG. 12, the noise current loop is enlarged, so that the noise reduction effect is reduced.